Job description

Responsibilities
- Pursuing or completed BTech/MTech degree in Electrical Engineering, Computer Engineering, or a related field.
- Good understanding of hardware micro-architecture and design.
- Proficiency in HDLs like Verilog and SystemVerilog.
- Familiarity with SystemVerilog Assertions (SVA) and basic concepts of formal property verification.
- Good debugging and problem-solving skills.
- Scripting knowledge (Python/Perl/shell).
- Good interpersonal and communication skills and a dream to work as a great team member.
The Impact You Will Have:
- Ensuring the reliability and functionality of complex design IPs through rigorous formal verification.
- Contributing to the development of high-quality IP that meets the stringent requirements of our clients.
- Driving innovation in verification methodologies and techniques.
- Collaborating with a talented team to achieve project milestones and goals.
- Enhancing the overall quality and performance of Synopsys’ product offerings.
- Playing a key role in the success of various high-profile projects within the company.
About Company
Synopsys is a leading technology company specializing in electronic design automation (EDA) and semiconductor IP, enabling the creation of advanced chips and systems. It empowers innovation in AI, automotive, and other cutting-edge industries.
Instructions to Follow Before Applying
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